A. Field of the Invention
This application is based on, and claims priority to, Japanese Patent Application No. 2009-108119, filed on Apr. 27, 2009, the entire contents of which are incorporated herein by reference.
B. Description of the Related Art
The present invention relates to a method of manufacturing a silicon carbide semiconductor device and in particular to a method of manufacturing a silicon carbide semiconductor device having a structure of a trench or a hole.
A semiconductor device of a MOSFET (metal oxide semiconductor field effect transistor) or an IGBT (insulated gate bipolar transistor) has trenches with a shape of a straight line formed in a stripe pattern from the surface of the semiconductor substrate. In the case of a MOSFET with a super junction structure, the trench is formed in a rectangular or circular shape in place of the stripe pattern. In another case, a hole is formed to take contact with one of the laminated semiconductor regions.
In a semiconductor device having a trench structure with a shape of a straight line in particular, electric field concentration occurs at an end of the trench when a high voltage is applied to the semiconductor device. Electric field concentration is also apt to occur at an end of the trench when the end of the trench has become a sharp edge in a dry etching process. If the electric field concentration occurs at the end of the trench exceeding a withstand voltage, the semiconductor device may be broken down.
FIG. 13 is an electron micrograph showing a result of leak analysis on a conventional MOSFET having a trench structure. An emission microscope (EMS) is used for observation of the MOSFET. The MOSFET of FIG. 13 is provided with trench 101 with a linear shape in the semiconductor device using a silicon carbide (SiC) semiconductor substrate. (This device is referred to as an SiC semiconductor device in the following description. In FIG. 13, light emission due to electric current leakage is observed at the end 102 of the trench (encircled part). Such a part of light emission is liable to generate electric field concentration and brings about break down.
In order to avoid the above-described problem in the case of a semiconductor device using a silicon semiconductor substrate, techniques are known to form the end of the trench rounded and to the end by connecting the ends of the trenches.
A semiconductor device with a trench structure has been disclosed in Japanese Unexamined Patent Application Publication No. 2003-188379, for example, in which the end of the trench is rounded. The semiconductor device of this document has a planar configuration with a width in a vicinity of the end narrower than that in a body part near the center. The part around the end is formed shallower than that of the body part by a dry etching process and the corner part of the trench end is rounded. This configuration eliminates a singular point at the corner part of the trench end in a gate oxide film and a gate electrode to mitigate or vanish the electric field concentration to the corner part of the trench end, thus avoiding degradation of a withstand voltage at the corner part of the trench end.
Japanese Patent No. 4130356 discloses a semiconductor device comprising, in a first cell region and a second cell region adjacent to each other of a semiconductor layer formed in a semiconductor substrate: a plurality of trench lines with a stripe pattern formed in a parallel with each other along a positive direction, the positive direction being defined by a direction directing from the first cell region towards the second cell region through the boundary between the first cell region and the second cell region; a first connecting trench partly connecting two adjacent first ends of the trench lines in the positive direction; a second connecting trench partly connecting two adjacent second ends positioned oppositely to the first end; gate insulation films formed in the trench line and in the first and second connecting trenches; gate electrodes embedded in the trench line and in the first and second connecting tranches through the gate insulation films; a gate wiring formed on the semiconductor layer at the boundary between the first cell region and the second cell region and electrically connecting to the gate electrodes; a first electrode formed on the semiconductor layer between the adjacent trench lines; and a second electrode formed on a surface of the semiconductor substrate opposite to the semiconductor layer; wherein at least one of the first connecting trenches in the first cell region does not face to the second connecting trench in the second cell region.
Japanese Unexamined Patent Application Publication No. 2001-168329 discloses a semiconductor device having a trench structure with adjacent trenches connected by a U-shaped curved part, in which a connecting part with a large radius of curvature is formed connecting an end of the trench directing towards a tip end and one end of the adjacent trenches, the connecting part being provided in a p well region.
Japanese Unexamined Patent Application Publication No. 2001-332727 discloses another semiconductor device having a trench structure with adjacent trenches connected by a U-shaped curved part, in which a connecting part with a width larger than that of the straight line portion of the trench is formed connecting an end of the trench directing towards a tip end and an end of the adjacent trenches.
However, it has been found through extensive studies by the inventors of the present invention that the following problem would result if the above-described technologies are applied to the SiC semiconductor devices. A description will be made on the case of the technology of Japanese Unexamined Patent Application Publication No. 2001-168329 applied to an SiC semiconductor device. FIG. 14 is an electron micrograph observed from the front surface side of a conventional silicon carbide semiconductor device before heat treatment. The observation on the SiC semiconductor device was carried out using a scanning electron microscope (SEM). The same SEM was used for taking the pictures of FIG. 1 and FIGS. 3 through 16. The SiC semiconductor device of FIG. 14 has trench 111 formed in the surface layer thereof. Trench 111 is composed of adjacent trenches 112 with the shape of a straight line (referred to as a straight line portion of a trench in the following description) and connection portion 113 that connects the ends of straight line portions 112 of the trenches with a semicircular line.
Trench 111 of the SiC semiconductor device shown in FIG. 14 is formed by dry etching. The connecting portion 113 of the trench is confirmed to include parts with a narrowed trench width and parts with an irregular configuration in the side wall of the trench; those parts are referred to as defective trench etching configuration 114. The defective trench etching configuration 114 can be assumed to be generated due to difference in the dry etching speed depending on the crystal plane of the semiconductor device (crystal plane orientation dependence).
FIG. 15 is an electron micrograph observed from the front surface side of a conventional silicon carbide semiconductor device after heat treatment. The heat treatment was conducted in an argon gas flow with an additive of monosilane (SiH4) in a flow rate fraction of 0.4%, under a pressure of 80 Torr at a temperature of 1,700° C. for 60 minutes. A focused ion beam apparatus (FIB) was used in the observation of the SiC semiconductor device, which is also applicable in the following. The heat treatment subjected to the SiC semiconductor device is confirmed to create the parts of filled trench in portions of connection portion 113 of the trench (referred to as defective trench formation 115).
A configuration of the defective trench formation portion 115 was observed by cutting out a cross section of the SiC semiconductor device.
In the process of manufacturing a semiconductor device with a trench structure, a heat treatment is conducted, after forming the trench, on the semiconductor device at a temperature at least 1,500° C. for improving a trench configuration and activation after ion implantation, for example. As described above, such a heat treatment subjected to an SiC semiconductor device generates deformation such as narrowed trench width and shallower trench in some parts of the trench connection portion. It has been further found that a degree of the deformation of the narrowed trench width and shallower trench depth by the heat treatment in the trench connection portion and places of such deformation differs depending on a radius of curvature of the trench connection portion. The radius of curvature of the trench connection portion is determined by a cell pitch of the trench straight portions. It has been clarified that various cell pitches generate various degree of irregularities on various parts of the side wall and the bottom surface of the trench connection portion depending on the magnitude of the cell pitch. If a part of the trench connection portion narrowed in the trench etching process is further narrowed or shallower due to a heat treatment process, the part of the trench connection portion would be filled out. If the irregularities created due to the heat treatment deform greatly the trench connection portion, the irregularity itself becomes a defective trench formation part.
Thus, a part of the trench connection portion may be buried in an SiC semiconductor device due to a heat treatment process at a temperature of not lower than 1,500° C. notwithstanding the connection with the trench connection portion between the straight line portions of the trenches. If a part of the trench connection portion is buried, an end is created in the trench or an end of the trench becomes an acute shape. As a result, the electric field concentration occurs at the end part of the trench, degrading the SiC semiconductor device or even breaking the device.
In order to mitigate the electric field concentration, a corner of an opening part of the trench needs to be rounded. If a radius of curvature of the rounded corner is excessively large, it is difficult to control an amount of dry etching of polycrystalline silicon from the surfaced position of the trench opening to the minimum in the polysilicon electrode (a gate electrode) filled in the trench. A large radius of curvature at the corner of a trench requires a large amount of etched polysilicon from the trench opening. In an extreme case as shown in FIG. 16, a region 104 is created in which the top surface position of the polysilicon electrode 103 does not reach the bottom surface position of the n+ region, causing failure of channel inversion in the p region making the device inoperative. FIG. 16 is an electron micrograph of a silicon carbide semiconductor device with a large radius of curvature at the corner of the trench opening observed from a cross sectional direction.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.